Searching for the Memory Holy Grail: Part 1
by Wesley Fink on July 27, 2003 11:13 PM EST- Posted in
- Memory
FSB Overclocking with 1, 2, and 4 DIMMs
Since we have established that the best performance at DDR400 or above (1:1) is with four DIMMs, it is natural to ask whether there is a downside to running four DIMMs instead of two or even one DIMM.| Front Side Bus Overclocking Test Setup | ||
| Processor: | Intel Pentium4 3.0C 800FSB Hyperthreading | Intel Pentium4 2.6C 800FSB Hyperthreading |
| Motherboard: | DFI 875PRO Lan Party(875) | Asus P4P800 Deluxe (865) |
| CPU Vcore: | 1.60v | 1.650V |
| Memory: | OCZ3700 GOLD DDR466 | OCZ3700 GOLD DDR466 |
| vDIMM: | 1.70V (MB limited) | 1.85V (MB Limited) |
| Cooling: | Thermalright SLK-900U | CoolerMaster HeatPipe |
| Power Supply: | Vantec 520W | Powmax 400W |
| Pentium4 3.0C 800FSB CPU | Pentium4 2.6C 800FSB CPU | |||||
| # of DS DIMMs: | 1 | 2 | 4 | 1 | 2 | 4 |
| MAXIMUM Stable FSB: | 992 (4x248) CPU Limited |
992 (4x248) CPU Limited |
968 (4x242) | 1048 (4x262) | 1032 (4x258) | 1024 (4x256) |
| SPD or Manual: | SPD | SPD | SPD | SPD | SPD | SPD |
| CAS Latency: | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 | 2.5 |
| RAS to CAS Delay: | 3 | 3 | 3 | 4 | 4 | 4 |
| RAS Precharge: | 7 | 7 | 7 | 7 | 7 | 7 |
| Precharge Delay: | 3 | 3 | 3 | 4 | 4 | 4 |
Despite the slightly lower overclock possible with four DIMMs, the best 1:1 performance is still with four DIMMs. For example, DDR516 using four DIMMs out-performs DDR530 with two DIMMs – since the four DIMMs are about 7% to 10% higher in UNBuffered memory performance.
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Anonymous User - Tuesday, July 29, 2003 - link
Wesley Fink - Monday, July 28, 2003 - link
Yes, you read it correctly. the mixed dimms can vary from very large drops - 20 to 27% or so - to very little if any drop for closely matched pairs. Performance seems to fare best when mixed pairs are the same capacities and the same "bank" configuration.ViRGE - Monday, July 28, 2003 - link
Very good article, Wesley, but I'm a bit confused on your mixed vs. matched DIMM comparison. On the 1st configuration, 2x256DS + 2x512DS, the timings look to be the same as in the 1st table on page 4, the DDR 400 numbers. Am I reading this correctly? It seems odd(although believable) that memory bandwidth dropped 25%, even though it stayed as 4 DS DIMMs at the same timings.PrometheusN - Monday, July 28, 2003 - link
Thanks to a reader for pointing out one correction to this article. The Intel White Paper from the 865 chart reverses 1 and 2 memory positions compared to the 875 white paper. While I did not test 865 performance in the review, I did make reference to the White Paper Chart.We can also wonder, with Intel not sanctioning PAT on the 865, exactly how the 865 boards WITH PAT will behave, and if memory on an 865 with PAT changes back to the same as 875.
Anonymous User - Monday, July 28, 2003 - link
You did not close your table on page eight.3 4 DS/td> Dual Channel
Add a < to the "/td>" ;)
Otherwise... Great article, very informing, thanks for taking the time to write this up.
PrometheusN - Monday, July 28, 2003 - link
Single-Sided or Double-Sided IS a functional description - but it normally is also a visual description. BEWARE dimms that skip every other chips on both sides. These have 4 chips on each side, but are functionally Single-Sided.PrometheusN - Monday, July 28, 2003 - link
According to CPU-Z 1.18C, 4 Sticks of ram - single or double - do NOT disable "PAT" on the DFI 875PRO or the Asus P4C800-E. It depends on how the motherboard BIOS handles the 4 Dimms.Wesley Fink
Shalmanese - Monday, July 28, 2003 - link
Nice article but what are the real world consequences of these numbers? When DDR was 1st introduced, we only saw a ~10% peroformance increase from a 100% increase in memory bandwidth so I am thinking that the difference between 2 and 4 banks would be trivial.ghg - Monday, July 28, 2003 - link
Hi PromNice review, as we expected from you 8-).
Using 4 sticks of doublesided OCZ 3700 Gold disables PAT according to CPU-Z 1.18c.
Same behavior when taking 4 sticks of singlesided OCZ 4000 ?
Ciao
Gary
ghg - Monday, July 28, 2003 - link