<b>Updated</b> CPU Cheatsheet - Seven Years of Covert CPU Operations
by Jarred Walton on August 28, 2004 9:00 AM EST- Posted in
- CPUs
Conclusion
Obviously, that's only a brief glimpse at the processor histories of AMD and Intel, with a vague picture of the future. Dual core designs should start appearing within the next year, and rumors of quad core processors are also floating around the web. At some point, we will likely reach the limits of current manufacturing technologies, but that day is still a long ways off. AMD and Intel both have technologies in development that should carry us past 45 nm process technologies, and probably down to single digits in our lifetime. That's assuming we don't get quantum computers first, that make all of the current binary systems seem quaint by comparison.
The amount of processing power sitting in front of you right now was beyond comprehension a couple decades ago. Even the "average" computers of today would seem amazing to people even one decade in the past. Ten years ago, 3D was only dreamt about, and professional 3D accelerators cost thousands of dollars while doing far less that a "cheap" GeForce 3 or Radeon 8500. Ten years ago, 32-bit processors were still looking for a real operating system, and 64-bit was only used by governments and research centers. Ten years ago, a 100 MHz processor was as good as it got. Ten years ago, few people had ever used a networked computer at home, and 28.8 modems were amazingly fast. Here's hoping the gurus at AMD, Intel, and other companies can continue to amaze us for another ten years!
Stay tuned for more insider articles from Jarred, including a much anticipated GPU cheat sheet as well!
Facebook
Twitter
RSS
74 Comments
View All Comments
JarredWalton - Monday, August 30, 2004 - link
#50 - Good catch. Obviously, there was some cutting and pasting involved. At some point, I corrected all of the names, but missed some of the clock speeds (at least on the Intel charts).#53 - Yes, you are correct. Someone corrected me before, but I didn't change both AMD charts. The Clawhammer supposedly does not have all three HyperTransport paths, so the FX would have to use the Sledgehammer core. It's just a little odd trying to figure out what AMD is doing on those cores. If it were Intel, every core version (i.e. different cache size, different memory controller, different socket) would probably get its own name. :)
OC DETECTIVE - Monday, August 30, 2004 - link
Actually #25's assertion that the FX 939 is a Clawhammer is incorrect. See details of correspondence with AMD's technical dept.over hereit is a Sledgehammer!
http://www.xtremesystems.org/forums/showthread.php...
Pumpkinierre - Sunday, August 29, 2004 - link
#49 There was a post not so long back that had the Prescott pipeline at 22 stages. But your information is right at launch. I just wonder how valid all this pipeline model is or whether the processor takes what it needs for the task required.karlreading - Sunday, August 29, 2004 - link
very informative article, very handy when talking hardware!!!heintjeput2 - Sunday, August 29, 2004 - link
A found a few things who are probably wrongP4 2.2 2800 Northwood 512 100 28.0X 478
should be:
P4 2.2 2200 Northwood 512 100 22.0X 478
and:
P4 3.2E 3800 Prescott 1024 200 19.0X 478
should be:
P4 3.2E 3200 Prescott 1024 200 16.0X 478
P4 540/J 3800 Prescott 1024 200 19.0X T/775
should be:
P4 540/J 3200 Prescott 1024 200 16.0X T/775
P4 3.2C 3800 Northwood 512 200 19.0X 478
>>
P4 3.2C 3200 Northwood 512 200 16.0X 478
P4EE 3.2 3800 Gallatin 512 200 19.0X 478 2048
>>
P4EE 3.2 3200 Gallatin 512 200 16.0X 478 2048
PM 1.2 (LV) 1800 Banias 1024 100 18.0X 478M
>>
PM 1.2 (LV) 1200 Banias 1024 100 12.0X 478M ??
MP4 3.2 HT 3800 Northwood 512 133 28.5X 478M
>>
MP4 3.2 HT 3200 Northwood 512 133 25.5X 478M
Athlon XP-M 2600+ 1933 Barton 512 133.3 14.5X
>>
Athlon XP-M 2600+ 2000 Barton 512 133.3 15.0X
Sempron 3100+ 1800 Paris** 256 200 9.0X 754
>>
Sempron 3100+ 1800 Paris* 256 200 9.0X 754
add:
Athlon XP-M 2400+ (ULV) 1800 Barton 512 133.3 13.5X
Athlon XP-M 2400+ (LV) 1800 Barton 512 133.3 13.5X
Athlon XP-M 2500+ (LV) 1867 Barton 512 133.3 14.0X
Athlon XP-M 2600+ (LV) 2000 Barton 512 133.3 15.0X
IntelUser2000 - Sunday, August 29, 2004 - link
I don't understand why people don't look up at Anandtech's old articles for information(or at least don't seem to)Take a look at the Pentium 4 Willamette article that states 10-stage pipeline for Pentium III and 20-stage pipeline for Pentium 4. I believe the most common figures are the Integer pipelines not including fetch/decode stages(according to your article anyway).
Link to article: http://www.anandtech.com/cpuchipsets/showdoc.aspx?...
Also why does it say Prescott have 23 stage pipelines?
"The Prescott further extended the NetBurst pipeline to 23 stages in addition to the 8 fetch/decode stages. For whatever reason, Intel generally describes the pipeline of the Prescott as 31 stages while only calling the earlier design a 20 stage pipeline."
JarredWalton - Sunday, August 29, 2004 - link
47 - Somehow I screwed that up in the update. Sorry. The 133 MHz bus (533 FSB) Xeon chips run in socket 604, so the two later Prestonia core Xeons are socket 604 parts. As far as I know, all the Gallatin Xeon cores are still socket 603.Marlin1975 - Saturday, August 28, 2004 - link
ALL the P4 Xeons are listed at socket 603. I know the later and even current ones are now 604.Zebo - Saturday, August 28, 2004 - link
One of the best guides I even read thanks I learned a lot.:)JarredWalton - Saturday, August 28, 2004 - link
Not like anyone is going to notice anymore (*wink*), but the article has now been updated with all of the corrections as well as additional commentary. I hope this clarifies a few things. If there are still errors, send them my way!