Intel Q3'05 Roadmap: Conroe Appears, Speculation Ensues
by Kristopher Kubicki & Jarred Walton on August 8, 2005 3:13 AM EST- Posted in
- CPUs
Besides all the talk about the future architecture, there's not much to say about the desktop parts. Here's the current roadmap.
| Intel Desktop Performance Roadmap | ||||
| Processor | Core Name | Clock Speed | Socket | Launch Date |
| Pentium 673 | Cedar Mill | 3.8 2MB | LGA 775 | 2H'06 |
| Pentium 672 | Prescott 2M + VT | 3.8 2MB | LGA 775 | Q4'05 |
| Pentium 663 | Cedar Mill | 3.6 2MB | LGA 775 | Q1'06 |
| Pentium 662 | Prescott 2M + VT | 3.6 2MB | LGA 775 | Q4'05 |
| Pentium 653 | Cedar Mill | 3.4 2MB | LGA 775 | Q1'06 |
| Pentium 643 | Cedar Mill | 3.2 2MB | LGA 775 | Q1'06 |
| Pentium >= 633 | Cedar Mill | 3.0 2MB | LGA 775 | Q2'06 |
| Pentium 631 | Cedar Mill (no VT) | 3.0 2MB | LGA 775 | Q1'06 |
| Pentium 571 | Prescott | 3.8 1MB | LGA 775 | Now |
| Pentium 561 | Prescott | 3.6 1MB | LGA 775 | Now |
| Pentium 551 | Prescott | 3.4 1MB | LGA 775 | Now |
| Pentium 541 | Prescott | 3.2 1MB | LGA 775 | Now |
| Pentium 531 | Prescott | 3.0 1MB | LGA 775 | Now |
| Pentium 521 | Prescott | 2.8 1MB | LGA 775 | Now |
The single core Pentiums remain unchanged from last month, with the exception of the 673 showing up at the top. Processor models ending with a 3 will use the new Cedar Mill core, the single core version of Presler. They will be based on 65nm process technology and will include all the same extra technologies we mentioned earlier. They will also have HyperThreading enabled, where the dual core Presler chips do not. There is also a potential lower end 633 model scheduled to be introduced in Q2'06, though it may or may not be released, likely depending on demand and yields.
One final update for the mainstream desktop market is that the EM64T enabled 5x1 Pentium chips are finally available. We've been talking about them for a few months, and retail availability was expected before now. They were probably held back to let inventory of the earlier versions clear out. You can see the new chips in our Pricing Engine.
| Intel Desktop Value Roadmap | ||||
| Processor | Core Name | Clock Speed | Socket | Launch Date |
| Celeron D ??? | Cedar Mill 512K + EM64T | ??? | LGA 775 | 2H'06 |
| Celeron D 355 | Prescott 256K + EM64T | 3.33 256K | LGA 775 | Q4'05 |
| Celeron D 351 | Prescott 256K + EM64T | 3.2 256K | LGA 775 | Now |
| Celeron D 346 | Prescott 256K + EM64T | 3.06 256K | LGA 775 | Now/Soon |
| Celeron D 341 | Prescott 256K + EM64T | 2.93 256K | LGA 775 | Now/Soon |
| Celeron D 336 | Prescott 256K + EM64T | 2.8 256K | LGA 775 | Now/Soon |
| Celeron D 331 | Prescott 256K + EM64T | 2.66 256K | LGA 775 | Now/Soon |
| Celeron D 326 | Prescott 256K + EM64T | 2.53 256K | LGA 775 | Now/Soon |
The Celeron picture is similar to the single core Pentium market. The EM64T enabled Celeron D chips are all starting to ship, after a month or two of waiting. Once again, you can check the current prices and availability on our Pricing Engine - at present the 351 is available, but we aren't picking up any of the slower "+1" parts. Current generation Celerons do not have VT, HT, or EIST support, but they do include XD (as have all Celeron D chips since the "J" variants started shipping almost a year ago).
Once Intel transitions to 65nm, a new version of the Celeron based off the Cedar Mill core will arrive. Clock speeds are not yet set, but we do know that it will continue to use a 533 MHz FSB, and it will increase the amount of L2 cache to 512K. That will make the chip relatively interesting, as the old Northwood core also included 512K of cache. Of course, the pipeline of Northwood was only 20 stages rather than 31, so clock for clock Northwood may still be faster. With a 65nm process, however, we expect the chips to be able to hit relatively high clock speeds, and architectural tweaks may help them to surpass Northwood performance. You're still looking at relatively equivalent performance for around $100 a CPU, which compares favorably to the higher end Northwood cores of the past.If you're in the market for a value system and you feel the need to purchase a 64-bit processor, we'd recommend that Intel buyers get a motherboard that uses the 945P or 945G chipsets. If you don't feel the support for dual core processors is important, we'd still recommend 915G/P as being the next best alternative. We would stay away from the 915GV/GL/PL chipsets as they have limitations that make them unattractive; not to mention the fact that those chipsets are almost EOL by now too. 915GV is like 915G, but no external graphics port is provided. 915GL has the same problem, but it only supports DDR memory instead of DDR or DDR2. Finally, 915PL supports an external X16 PCIe slot but eliminates DDR2 support and allows the use of 1 DIMM per memory channel, limiting you to a maximum of 2GB RAM. The bottom line is that the P or the G versions are what most mainstream users will desire. There's also the 955X chipset on the high end, which allows the use of up to 8GB of RAM. Those who really need the increased address space of a 64-bit OS will likely want the option to use more than 4GB of RAM as well.
Final Thoughts
Most of the major releases of 2005 have now occurred, and other than a speed bump or two, there's not much else awaiting Intel owners (at least in the desktop market) this year. 2006 has quite a bit more in store. We haven't covered the mobile section, but many expect to see the dual core Pentium M Yonah available for the desktop as well as mobile markets. Beyond that, we're all waiting for Intel's answer to the performance conundrums of the past year, where they officially lost the performance crown to AMD and haven't been able to regain it. The change to 65nm processes will likely have some advantages, but the real counterattack is going to come in the form of the next Intel architecture. We've given some speculation as to what may be present, but most of the real details are still closely guarded secrets.
For nearly 25 years Intel was the leader in PC processor technology and performance, and we have a suspicion that they will be pulling out all the stops to regain that lead in 2006. The fact that they still lead in profits and market share gives them a lot of resources they can apply to that goal, and we eagerly await additional details of the new architectures. AMD will naturally have their own new processors and architectures, but we know even less about K9 than we do about Conroe. Waiting is the hardest part, unfortunately.
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IntelUser2000 - Thursday, August 18, 2005 - link
And can u tell me how that's not significant?? Yonah isn't like Smithfield's slap-on dual core, because it has arbitration logic to manage data between two cores. And even compared to A64 dual core, its not just dual core + SRQ-like, it has bunch of other enhancements which strengthen the weakness(FPU/SSE).
To: nserra
HT takes less than 5% die size, of course IMC is good, but Pentium 4 can have IMC too. I think HT and IMC is good in their own different ways.
Cache consumes low power, and takes little die space compared to number of transistors used. If you take 4 core on Athlon64 today on the 90nm, Prescott will look cool running compared to it.
The 6MB cache in Itanium 2 takes 60% die size but only 30% power consumption.
nserra - Friday, August 19, 2005 - link
I agree IntelUser2000, but even so, if each core used c&q with some disable core capability, would be in the 30W per core range (120W total) right on track with prescott 2M and Pentium D.I don’t know if you noticed, but amd added more power to their designs while their processor are consuming less.... that must be because:
Good reasons first:
-amd will achieve higher clock speeds 3.4 GHz and up
-amd is already thinking in 4 cores processors
Bad reasons:
-amd will come with some bad 65nm tech
-or will come with some bad core (M2 with rev.F prescott like)
coldpower27 - Saturday, August 13, 2005 - link
Yeh, from current rumors Yonah is having every check box feature besides EM64T :)Like I have said I can't wait till Intel brings Conroe technology, as I always have like going the Intel route, but I don't want to go for NetBurst based processors.
45nm generation looks to be quite the change for Intel, as they are moving to those tri-gate trasistors, High K, and FD-SOI, tohugh I beleive it would be introduced at the end of 2007 rather then mid at the earliest, Conroe is expected to debut on 65nm technology, hopefully it doens't need to get an optical shrink to get good like NetBurst did and is good from the get go, like Athlon 64 was.
IntelUser2000 - Friday, August 12, 2005 - link
I heard due to the limits of the Trace Cache throughput, it only can achieve IPC of 2, not 3, so even in theory, Pentium 4 only reaches IPC of 2.About the Hyperthreading technology, I sort of disagree. If the design of the microprocessor is made to accomodate such multi-threading technology, they don't need to put 24% increase in die size like Power 5 did. I heard only with 5% increase in die size, Alpha EV8 was supposed to have performance increase of 2x, which happens to be greater than by putting another core!!!
Pentium 4's HT takes LESS than 5% die size.
nserra - Wednesday, August 17, 2005 - link
Well if you think that the 5% die for HT is very well spent, what about the 5% of the AMD Athlon64 on the integrated memory controller.JarredWalton - Saturday, August 13, 2005 - link
In practice, I'd guess that NetBurst averages an IPC of around 1.3 overall. I'd say Athlon 64 is closer to 2.0. Obviously just a guess, but when you consider how a 2.4 GHz A64 3800+ compares to the P4 3.6 (570), that seems about right. Heck, P4 might even be 1.1 to 1.2 IPC on average if K8 is 2.0. Branch misses kill IPC throughput on NetBurst, for example.We also don't know precisely (well, I don't) what the various traces represent. It could be that many traces actually take up two of the "issue slots", as traces don't have to be a single micro-op.
HyperThreading in NetBurst is really pretty simplistic. It also doens't really help improvement much except in very specific circumstances. I can't imagine any SMT configuration actually providing a bigger boost than SMP, though. (Otherwise everyone would already be doing it, rather than just NetBurst and high-end Server chips.) I seriously doubt that a 5% die space increase would be able to get more than a 10% performance increase. 10% I could see being 20 to 30%, and 15% could be 50% or more - of course, all just guesses and all under specific tests.
If you're not running multiple CPU-intensive threads, any form of SMT helps as much as SMP, which is to say not at all. Basically, this is all just guessing right now anyway, so there's no point in worrying about it too much. I have to think that Intel can get MUCH better performance with the next architecture than anything they've currently got, though. 2MB+ cache on CPUs is a lot of wasted space that could be better utilized, IMO.
nserra - Wednesday, August 17, 2005 - link
Yeah I completely agree!!
I was hoping AMD would release a 4 core processor with 128KB L2 cache for each core. That would give almost the same transistor count of 2 cores with 1MB L2. But “a lot” more speed.
Of course in MARKETING, having a processor with a total of 512KB L2 cache would be a budget one, but for me a excellent efficient design.
IntelUser2000 - Tuesday, August 16, 2005 - link
Well, a point to make is this: because the designers of Alpha CPUs managed beat every other CPU at every generation and every process generation, having simpler core, then its likely that the future generation would have done so too.Its not that companies are not using SMT because they don't know the benefits of SMT, its that they don't know how to make it good. Did you think it made sense for Intel do make Prescott core? IBM looks like best doing at SMT because they are only one of the two that actually uses SMT nowadays, the other being Intel at desktop chips. Plus, server chip design are usually pushed to their technical limits, while desktop chips are made for mainly mass production and profit.
(Exception is Itanium code-name Montecito's multi-threading, since it uses different form of it)
IntelUser2000 - Tuesday, August 16, 2005 - link
About the IPC, in theory P4 can output IPC of 2 and Athlon 64, three. So even with same branch misses, in theory Pentium 4 will be slower than Athlon 64, not to mention on the real one, it adds branch misses.About SMT, look here: http://www.realworldtech.com/page.cfm?ArticleID=RW...">http://www.realworldtech.com/page.cfm?ArticleID=RW...
"The enormous potential of SMT is shown by the expectation that it can approximately double the instruction throughput of an already impressive monster like the EV8 at the cost of only about 6% extra die area over a single threaded version of the design. That is a bigger speedup than can be typically achieved by duplicating the entire MPU as done in a 2 way SMP system!"
Though it looks as P4's multi-threading is a simple one not destined to take advantage of the architecture, its more the other way around.
Pentium 4 with limited IPC throughput(2 max), limited number of registers(8 and 16 in 64-bit), limited bandwidth, is crippling HT's ability.
Alpha EV8 was supposed to have IPC of 8 in theory, 1024 registers(!!), integrated memory controller with 20GB/sec bandwidth per CPU, and the architecture that was developed to take advantage of SMT from the beginning shows its full benefits.
Next-gen Itanium with multi-threading is a different story. Montecito doesn't use SMT, it uses different form of multi-threading, so its not really comparable.
Horshu - Friday, August 12, 2005 - link
Does Conroe's roadmap intersect early on with the 45 nm process (2007)? That was the point at which Intel was supposed to migrate over to the new high-K/metal transistor gates, although I recall something about those plans being dropped while Intel works on a new high-K process. The new gates were supposed to dramatically reduce heat dissipitation, although I have no idea what to expect from the new high-K they are working on.