VIA's KT333: The Athlon gets DDR333

DDR333: Marketing or Necessity?

When any chipset manufacturer gets to work on designing their next-generation core logic, do they try and solve today's problems or those that may appear in the future? Think back to the introduction of the Ultra ATA 66 spec into South Bridges, did it occur before or after hard drives demanded the added bandwidth? Or what about the introduction of DDR SDRAM to the Athlon platform with the AMD 760 chipset? Did the Athlon demand that sort of memory bandwidth back then? While it's true that necessity is the mother of invention, when it comes to designing chipsets it's what's perceived to be necessary in the future that gets included in today's new chipsets.

That brings us to the question of whether DDR333 is necessary or not. Given today's requirements, most likely not but remember that you could've said the same for DDR266 two years ago. You shouldn't have high hopes for the introduction of DDR333 nor should you rush out and replace all of your memory with DDR333 rated DIMMs, but realize the purpose of introducing it now is to be prepared when platforms like the Claw Hammer demand it down the road.

The specifications for DDR333 are pretty simple from a high-level; instead of operating on a 133MHz clock frequency the standard calls for a 166MHz operating frequency. Since we're dealing with DDR SDRAM here data is transferred twice per clock (as I'm sure you're tired of hearing) thus causing many to say it operates at 333MHz. You may have also heard DDR333 referred to as PC2700, both refer to the same basic specification of SDRAM.

With a 166MHz clock frequency, DDR333 SDRAM can offer another 25% of memory bandwidth over DDR266 SDRAM. We've already been through these calculations before when SiS introduced DDR333 for the Pentium 4 with their 645 chipset but as a refresher here's a quick table comparing all of the currently used Athlon memory subsystems:

The most limiting factor here will be the Athlon's 133MHz DDR FSB which will only allow a maximum of 2.1GB/s of data to travel to/from the CPU. So in spite of the fact that the chipset will be able to get, in theory, up to 2.7GB/s of data from main memory it will only be able to hand 2.1GB/s off to the CPU.

AMD hasn't announced plans to move to a higher speed FSB anytime soon and while the added memory bandwidth would be useful on a point-to-point multiprocessor platform (each CPU gets its own 2.1GB/s bus to the chipset) VIA has already stated that they won't enter this market for the Athlon.