Intel's Dual Core Strategy Investigated
by Anand Lal Shimpi on October 22, 2004 3:09 PM EST- Posted in
- CPUs
Been hearing conflicting dual core information lately? Here's a compilation of everything we have and know about Intel's dual core plans for the next two years.
Dual Core for Desktops in 2005
Intel has yet to determine what brand they will market their first desktop chips under, although we'd expect them to continue to use the Pentium 4 brand but with some sort of appendage like Extreme Edition or Lots of Cores Version. Intel has, however, already determined what the specifications and the model numbers of their dual core chips will be.
Currently set for release in Q3 2005, Intel has three dual core chips on their desktop roadmap: the x20, x30 and x40. The only difference between these three chips is clock speed, with the x20 running at 2.8GHz, the x30 running at 3GHz and the x40 running at 3.2GHz. All of the chips are LGA-775 compatible and run off of an 800MHz FSB. Hyper-Threading is not enabled with Intel's dual core chips.
As far as architecture goes, the x-series of dual core CPUs from Intel are built on the little talked-about Smithfield core. While many have speculated that Smithfield may be Banias or Dothan based, it's now clear that Smithfield is little more than two 90nm Prescott cores built on the same die. There is a requirement for a very small amount of arbitration logic that will balance bus transactions between the two CPUs, but for the most part Smithfield is basically two Prescotts.
But doesn't Prescott run too hot already? How could Intel possibly build their first dual core chip out of the 90nm beast that is Prescott? The issue with Prescott hitting higher clock speeds ends up being thermal density - too many transistors, generating too much heat, in too small of a space. Intel's automated layout tools do help reduce this burden a bit, but what's important is that the thermal density of Smithfield is no worse than Prescott. If you take two Prescotts and place them side by side, the areas of the die with the greatest thermal density will still be the same, there will simply be twice as many of them. So overall power consumption will obviously be increased by a factor of two and there will be much more heat dissipated, but the thermal density of Smithfield will remain the same as Prescott.
In order to deal with the fact that Smithfield needs to be able to run with conventional cooling, Intel dropped the clock speed of Smithfield down to the 2.8 - 3.2GHz range, from the fastest 3.8GHz Prescott that will be out at the time. The reducing in clock speed will make sure that temperatures and power consumption is more reasonable for Smithfield.
Smithfield will also feature EM64T (Intel's version of AMD's x86-64 extensions), EIST (Enhanced Intel SpeedStep Technology) and Intel's XD bit support. Chipset support for Smithfield will come from Glenwood and Lakeport, both of which support the 1066MHz FSB (as well as 800) and Dual Channel DDR-2 667 and 533. Glenwood (the successor to 925X) will support up to 8GB of memory, making it the perfect candidate for EM64T enabled processors that want to break the 4GB barrier.
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Dasoo - Tuesday, November 2, 2004 - link
Has anyone heard anything about possible implications of the move to dual-core on memory? While I would guess that there would be little impact, I'm wondering if dual-core systems will use more memory or if dual-core will require performance characteristics.Thanks
Speedo - Sunday, October 31, 2004 - link
#55, "Right...unless you also happen to be running another application. For example "Windows" with 26 services..."Yea, but does these services, in a normal gaming computer installation, really take that much cpu time to really show an improvement in games?
For example, taking a look at the taskmanager right now shows I have 99% (or more) cpu resources free.
dak - Monday, October 25, 2004 - link
#31, "Hang on -- to all those that say dual threads are crap -- what exactly are you running -- AMD 64 maybe? they'res no software that can take advantage of the 64 bit, so its virtually the same thing no? "Sorry mate, I've got 2 amd64 boxes running 64 bit. It's called Linux you dolt. Windows ain't the only thing going on out there. And I can't wait for dual core, it'll be great for source based linux distros like gentoo....
knitecrow - Monday, October 25, 2004 - link
The only people raving about dual-core equals double the performance would be Intel spin doctors and computer noobs.Having a multithreaded application is not a simple matter of a linear increase in programming time/skill/effort/debug/validation ... it’s a geometric increase.
This makes multithreaded apps, inherently expensive with longer development cycle.
Furthermore, poorly written multithread apps can run far worse than single threads.
The windows OS is quite dumb when it comes to multithreading; while it may suffice for 2P and 4P... it becomes less appealing when you scale to 8P and outright useless after that. No wonder UNIX remains top choice for multiprocessor supercomputers.
Please consider REALITY before raving about dual processor.
Audiophile1980 - Sunday, October 24, 2004 - link
[q]In a single threaded application, no they will not be any faster. In a game for example, two 3.2GHz cores will not be faster than a single 3.2GHz core.[/q]
Right...unless you also happen to be running another application. For example "Windows" with 26 services...
eachus - Saturday, October 23, 2004 - link
"When AMD mentions that their K8 architecture was designed for multicore operation from the start, they weren't lying. Each Socket-939 or Socket-940 K8 chip, whether it's an Athlon 64, Athlon 64 FX or Opteron, features three Hyper Transport links (whether they are all operational is another question). In order to create a dual core version of a K8 based chip, you simply remove a single pair of Hyper Transport PHYs, one from each chip, and fuse the two Hyper Transport links together - thus creating a direct path of communication between the two cores, capable of transmitting data at up to 8GB/s (at 1GHz) between the two chips."That is not how AMD does it. Hammer chips have a cross-bar switch with connections to memory, Hypertransport links, and up to TWO CPU cores with cache. Dual core chips have one copy of the crossbar and memory controller, and both CPU cores connect to it. All done. The crossbar works at core-clock not memory speeds. The only case where the cross-bar could be a bottleneck is if both CPU cores have >50% cache hit rates on the other core's cache.
eachus - Saturday, October 23, 2004 - link
stephenbrooks - Saturday, October 23, 2004 - link
#27:--[There are several reasons why games aren't written multithreaded: 1. multithreaded apps have more overhead so they run slower on single CPU systems.]--
I never said they'd use multiple threads when running on single CPU systems. There's a very simple call in Windows you can do to determine how many processors there are, and you can decide how many threads you produce based on that. For instance if you have to detect collisions with 400 objects, you could do 100 in each of 4 threads, or 200 in 2 or 400 in the original thread.
--[2. most gaming systems are single CPU.]--
Yes, _right now_. If we end up having 4 or 8-core chips by 2010, single-threaded games are going to look rather silly.
--[3. the threads need to communicate with each other to get the frames drawn. Since the threads have critical sections, running them on a single CPU will make the critical sections que up causing major lag and drop in framerate.]--
The game would scale down to 1 thread on a 1 CPU (non-HT) system.
I think the main problem is that since there aren't so many multi-processor SMP systems out there, developers just think in terms of one thread all the time. It will take dual-cores etc. to become commonplace to change that.
Finally, will everyone who assumes "different threads have to be doing qualitatively different things" please stop it? That's complete pants. Often you get the best (near-linear) scaling when you just have a lot of repetitive (non-mutually-relying) things to do and you can split them equally between a thread for each CPU.
It's certainly true that _when no apps are multiprocessor-aware_ the different threads you have will be doing different things, but when the programmers know about how many CPUs there are, it's a whole different ball game.
douglar - Saturday, October 23, 2004 - link
From aces hardware--"According to AMD documentation, both cores in a dual-core chip are connected to one shared SRQ (System Request Queue). The SRQ has ports for CPU0 and CPU1. The links between the two cores and the SRQ runs at core frequency with 64-bit data paths. The SRQ is connected to the XBar (crossbar) which handles signal routing between the SRQ, MCT (Memory controller) and up to three HyperTransport Links. The SRQ is also connected to a APIC (Advanced Priority Interrupt Controller) that services both cores (dual Int ports).
The important thing here is that the cores are connected before the crossbar, not after it, as Anand suggests. Hence the cores in a dual-core chip will share all the HyperTransport links and the memory controller.
See slide 26 of Fred Weber's MPF Presentation, 2001:
http://www.amd.com/us-en/assets/content_type/Downl... "
Briggsy - Saturday, October 23, 2004 - link
The following is complete and utter bullcrap (from page 2): "Each Socket-939 or Socket-940 K8 chip, whether it's an Athlon 64, Athlon 64 FX or Opteron, features three Hyper Transport links (whether they are all operational is another question). In order to create a dual core version of a K8 based chip, you simply remove a single pair of Hyper Transport PHYs, one from each chip, and fuse the two Hyper Transport links together - thus creating a direct path of communication between the two cores, capable of transmitting data at up to 8GB/s (at 1GHz) between the two chips."NO NO NO NO NO NO NO
This has been described in detail by AMD since 2001. AMD DO NOT 'fuse' together two Hypertransport links to make a dual core processor.
AMD's processor incorporates an integrated Northbridge, which is a crossbar that attaches to the memory controller, hypertransport controllers, and the processor interface, called the SysReq. The SysReq can connect to TWO cores, and this was designed as a capability from the very beginning. AMD's dual core simply adds another CPU core and attaches it to the currently unused port on the SysReq.
If you get a simple, well explained, detail like that wrong, I can only assume the rest of the article isn't very reliable either.